Photovoltaic Devices Including An Interfacial Layer

ABSTRACT

A photovoltaic cell can include an interfacial layer in contact with a semiconductor layer.

CLAIM FOR PRIORITY

This application claims priority under 35 U.S.C. §119(e) to ProvisionalU.S. Patent Application Ser. No. 60/974,971 filed on Sep. 25, 2007,which is hereby incorporated by reference.

TECHNICAL FIELD

This invention relates to photovoltaic devices.

BACKGROUND

In general, photovoltaic devices can be composed of materials whoseproperties at an interface differ from the properties of the remainderof the material. An interface refers to the region near a free surfaceor grain boundary as well as to the region between two differentmaterials. In particular electrical properties of a material at aninterface can be affected by trapped charge, dipole layers andinterdiffusion. Properties of a material at an interface can also beaffected by localized energy levels, i.e., energy levels that existwithin a limited space (as opposed to energy bands). Localized energylevels are typically associated with impurities, intrinsic defects, orcrystallographic defects at an interface.

SUMMARY

A photovoltaic device can include a transparent conductive layer on asubstrate, a first semiconductor layer including a wide bandgapsemiconductor, a second semiconductor layer having a surface, and aninterfacial layer in contact with the second semiconductor layer,wherein the interfacial layer maintains a chemical potential of thesecond semiconductor layer at a controlled level.

The second semiconductor layer can include a CdTe. The secondsemiconductor layer can include an alloy of CdTe. The secondsemiconductor layer can include a CdTe alloy wherein Cd is at leastpartially replaced by Zn, Hg, Mg or Mn. The second semiconductor layercan include CdTe alloys wherein Te is at least partially replaced by S,Se or O.

The photovoltaic device can have an interfacial layer that maintains thechemical potential of Cd. The device can have chemical potentialcontrolled within a region of the semiconductor proximate to theinterface of the second semiconductor. The interfacial layer can bebetween the second semiconductor layer and a back electrode. Theinterfacial layer can be a third semiconductor layer.

The photovoltaic device can have a the semiconductor material thatincludes ZnTe, CdZnTe, CuAlS₂, CuAlSe₂, CuAlO₂, CuGaO₂, or CuInO₂. Theinterfacial material can include GeTe, CdTe:P, CdTe:N, NiAs or NbP.

A semiconductor layer, such as a CdTe layer can have a surface. Thesurface can include chemical bonds between Cd and an element from columnVA of the periodic table. The surface can include chemical bonds betweenCd and N, P, As, and Sb. The interfacial layer can be between the secondsemiconductor and the first semiconductor layer.

The first semiconductor layer can include a SnO₂, SnO₂:Zn, SnO₂:Cd, ZnO,ZnSe, GaN, In₂O₃, CdSnO₃, ZnS or CdZnS. The interfacial layer can becompound of Cd with one any of the chalcogenides including O, S, or Se.The interfacial layer can include a CdS.

The device can include a semiconductor having a surface includingchemical bonds between Te and any of the elements from column IIIA ofthe periodic table. The device can include a semiconductor having asurface that includes chemical bonds between Te and B, Al, Ga, In, orTl.

In some circumstances, the interfacial layer can be a material with achemical formula ABO₂, wherein A is either Cu, Ag, Au, Pt or Pd and B isone of the trivalent metal ions Al, In, Cr, Co, Fe, Ga, Ti, Co, Ni, Cs,Rh, Sn, Y, La, Pr, Nd, Sm or Eu, or doped compositions thereof. In othercircumstances, the second semiconductor layer can be less than 2 umthick. In other circumstances, the second semiconductor layer can beless than 1 um thick. The device can include an additional interfaciallayer between a transparent conductive layer and a first semiconductorlayer.

A method of manufacturing a photovoltaic device can include depositing afirst semiconductor layer on a substrate, the first semiconductor layerincluding a wide bandgap semiconductor, depositing a secondsemiconductor layer over the first semiconductor layer, and depositingan interfacial layer to contact a second semiconductor layer, whereinthe interfacial layer maintains the chemical potential of the secondsemiconductor layer at a controlled level.

In some circumstances, the interfacial layer can be deposited bysputtering. The interfacial layer can be deposited by atomic layerdeposition. The interfacial layer can be deposited by selective ionlayer adsorption and reaction deposition.

A system for generating electrical energy can include a transparentconductive layer on a substrate, a first semiconductor layer including awide bandgap semiconductor, a second semiconductor layer, an interfaciallayer in contact with a second semiconductor layer, wherein theinterfacial layer maintains the chemical potential of the secondsemiconductor layer at a controlled level, a first electrical connectionconnected to the transparent conductive layer, and a second electricalconnection connected to the back metal contact.

In some circumstances, a transparent conducting layer electrode can bereplaced by a metallic electrode, and the metallic back electrode can bereplaced by a transparent conducting layer electrode. In othercircumstances, a system can further include a first electrode connectedto the transparent conductive layer and a second electrode connected tothe back metal contact. In other circumstances, a back metal electrodecan be replaced by a transparent conductive layer, and the device can beused in tandem with another photovoltaic device.

The details of one or more embodiments are set forth in the accompanyingdrawings and the description below. Other features, objects, andadvantages will be apparent from the description and drawings, and fromthe claims.

DESCRIPTION OF DRAWINGS

FIG. 1 is a schematic of a photovoltaic device having multiple layers.

FIG. 2 is a schematic of a system for generating electrical energy.

FIG. 3 is a schematic of a photovoltaic device having multiple layers.

FIG. 4 is a schematic of a photovoltaic device having multiple layers.

FIG. 5A is a schematic of a photovoltaic device having multiple layers.

FIG. 5B is a schematic of a photovoltaic device having multiple layers.

FIG. 5C is a schematic of a photovoltaic device having multiple layers

DETAILED DESCRIPTION

In general, a photovoltaic device can include a first semiconductorlayer including a wide bandgap semiconductor, a second semiconductorlayer, and an interfacial layer in contact with the second semiconductorlayer, wherein the interfacial layer maintains a chemical potential ofthe second semiconductor layer at a controlled level. A controlled levelrefers to a steady state chemical potential under conditions ofillumination and bias both at the interface and within the region nearthe interface in a manner to optimize device performance. A controlledlevel of chemical potential cannot be achieved by passivating a grainboundary alone. Rather, one should try to specifically anticipate theimpact of a modified chemical potential on the intrinsic defects withinthe region near the interface.

With CdTe photovoltaic devices, for example, defect formation energy andassociated localized energy levels (the energy levels existing within alimited space) are characterized by chemical potential of those defects.The specification of a defect includes its charge state, i.e., V_(Cd)≠V⁻_(Cd). The two defects are related by the chemical reactionV_(Cd)+e⁻⇄V_(Cd). The atomic structure and energy levels of the twodefects typically differ. In this example, the relative concentration ofthe various defects is controlled by the law of mass action. Theconcentration of V_(Cd) depends upon the chemical potential of Cd, andthe concentration of electrons depends upon the electron quasi-Fermilevel. The quasi-Fermi level within a device, in turn, depends on theintensity and spectral content of illumination, the voltage bias appliedto the device, and the type and concentration of defects within thedevice. As with all chemical reactions, the rate of defect chemicalreactions is a function of temperature. In some semiconductor materialsthe rate of chemical reaction at temperatures existing in a photovoltaicarray field may be sufficient to produce changes in the defectconcentration that in turn affect the power conversion efficiency of aphotovoltaic device. Thus it is important that the materials andinterfaces in a photovoltaic device be designed such that the relevantdefect chemistry that exists under steady state conditions ofillumination and bias found in the field be optimized to produce maximumpower conversion efficiency in the field.

With CdTe photovoltaic devices, it is believed that the most relevantdefect chemistry relates to a Cd sub-lattice. For example, for a Frenkeldefect the chemical reaction is Cd_(Cd)⇄V_(Cd)+Cd_(i). The cadmium atomon a cadmium atom site has a reversible reaction to become a vacantcadmium site plus a cadmium atom at an interstitial site.

In the vicinity of a surface, s, or a grain boundary, gb, the equivalentreactions become Cd_(Cd)⇄V_(Cd)+Cd_(s) or Cd_(Cd)⇄V_(Cd)+Cd_(gb).Cadmium interstitials are donors and cadmium vacancies are acceptors. IfCd atoms at grain boundaries or surfaces are also donors, then grainboundaries and surfaces would tend to be characterized by dipole layersor n-type grain boundaries or surfaces adjacent to p-type sub-surfacelayers.

Photovoltaic devices consist of several layers. In one configurationlayers of semiconductor material can be applied to a substrate with onelayer serving as a window layer and a second layer serving as theabsorber layer. One essential feature of a photovoltaic device is that arectifying junction is formed between the two layers. In a typicalconfiguration of a single junction photovoltaic device one of thesemiconductors conducts electricity with positively charged holes and istherefore designated as a p-type material and the other semiconductorconducts electricity with negatively charged electrons and is thereforedesignated as an n-type material, and the junction of the two isdesignated a pn junction. Rectifying junctions can be formed between awide variety of semiconductor materials including, for example, pn, pp⁺,p⁻p, nn⁺, and n⁻n. Photovoltaic devices in which the main rectifyingjunction is between two semiconductors are called “pn devices” or“single junction” devices.

When sunlight or other optical radiation with energy greater than thesemiconductor bandgap is absorbed in the semiconductor layers photonsare converted to electron-hole pairs. Electrons in p-type semiconductorsand holes in n-type semiconductors are classified as “minoritycarriers”. Photogenerated minority carriers move within thesemiconductor layer in which they were created as driven by diffusionand drift until they either recombine with carriers of the opposite typewithin the semiconductor in which they were created or recombine at aninterface of the semiconductor in which they were created or arecollected by the other semiconductor layer. Recombination is a lossmechanism which reduces the photovoltaic power conversion efficiency inphotovoltaic devices.

In one configuration of a single junction photovoltaic device arelatively wide bandgap semiconductor is used as one of thesemiconductor layers. Use of a wide bandgap semiconductor layer hasseveral potential advantages including its use as a “window” layer. Whenoriented with the window layer facing the sun, the window layer canallow the penetration of solar radiation to the absorber layer wherephotons are converted into electron-holes pairs. In a photovoltaicdevice electrons are collected by the n-type material and holes arecollected by the p-type material. Once the carriers have been thuscollected current flow in the opposite direction is prevented by therectifying junction so that current is forced to go through an externalelectrical circuit. In this way optical power is converted intoelectrical power. The claimed device relates to methods to reduceelectron-hole recombination which reduces the electrical current atmaximum power of a photovoltaic device. Voltage at maximum power canalso be reduced by space charges including interface dipoles that existwithin a photovoltaic device. The claimed device reduces space chargesthat reduce maximum power voltage in a photovoltaic device. Thus claimeddevice improves the power conversion efficiency of a photovoltaic deviceby employing various interfacial layers as are described more fullybelow.

Some photovoltaic devices can use transparent thin films that are alsoconductors of electrical charge. The conductive thin films can betransparent conductive layers that contain a transparent conductiveoxide (TCO), such as fluorine-doped tin oxide, aluminum-doped zincoxide, or indium tin oxide. The TCO can allow light to pass through to asemiconductor window to the active light absorbing material and alsoserve as an ohmic electrode to transport photogenerated charge carriersaway from the light absorbing material. Additionally a back electrodecan be formed on the back surface of a semiconductor layer. The backelectrode can include electrically conductive material, such as metallicsilver, nickel, copper, aluminum, titanium, palladium, chrome,molybdenum or any practical combination thereof.

An alternative configuration of photovoltaic devices consistsessentially of three semiconductor materials and will be referred to asa “p-i-n device”. The “i” stands for “intrinsic” and refers to asemiconductor material that in equilibrium has a relatively low numberof charge carriers or either charge type or in which the net number ofcarriers, where “net” would be the absolute value of the concentrationof p-type charge carriers minus the concentration on n-type carriers, isless than about 5×10⁻¹⁴ cm⁻³. Typically the primary function of the “i”layer is to absorb optical photons and convert them to electron-holepairs. The photogenerated electrons and holes move within the “i’ layeras driven by drift and diffusion until they either “recombine” with eachother within the i-layer or at the p-i interface or at the i-n interfaceor until they are collected by the n and p layers, respectively.

In both the pn and p-i-n configurations, recombination of photogeneratedcharge carriers can be a loss mechanism that reduces the powerconversion efficiency of photovoltaic devices. Recombination at aninterface can be affected by factors including the type andconcentration of energy levels at the interface, the electric field onboth sides of the interface and any discontinuity in the valence orconduction band at the interface. Thus the interfaces betweensemiconductors and between metals and semiconductors have significantimpact on device performance. Methods of mitigating negative impacts ofinterfaces on device performance include selection of heterojunctionpartners to minimize the lattice mismatch between the two materials,grading material composition from one heterojunction material to theother, and “passivating” the interface with oxygen, sulfur, hydrogen orother materials in order to tie up dangling bonds responsible for themid-gap energy states. In addition researchers have used amphiphilicmolecules at interfaces in order to alter electrical performance bycreating a dipole layer on surfaces or at interfaces. Furthermore, inthe absence of lattice mismatch the symmetry of the crystal lattice canbe distorted simply by the existence of an interface between twomaterials of different electrical properties such that dipole layersform at the interface due to differences in the nature of chemicalbonding between atoms of the heterojunction partners. While researchershave been aware of the impact of interfaces on device performance andhave employed a wide range of approaches and specific solutions tomitigate their impact on device performance, the prior art does notaddress the impact of interfacial layers on the steady state chemicalpotential on the intrinsic and extrinsic defect chemistry of thesemiconductor materials involved. Thus, in the absence of a controlledelectrochemical potential within the semiconductor region adjacent toand including the interface under conditions of illumination and biasintrinsic and extrinsic defects may be created within that region whoseeffect is to lessen or negate the impact achieved through modificationof the interfacial states alone. The claimed device not only addressesthe impact of interfaces on device performance but also providesspecific and innovative device structures that demonstrate control ofthe chemical potential under steady state conditions of illumination andbias and thereby enable photovoltaic devices to demonstrate improvedpower conversion efficiency.

In one example of CdTe-based PV devices, both rectifying and lowresistance junctions with CdTe may include thin film interfacial layersdesigned to improve electrical performance of the devices. Interfaciallayers include, for example, oxides between the CdTe and metal electrodeof the MIS device and Te or Te-rich compounds such as Cu_(2−x)Te,Cu_(2−x)O and Sb₂Te₃ at the CdTe metal electrode interface. Interfaciallayers can be buffer layers that are typically produced by wetchemistry, sputter etching and sputter deposition, ebeam evaporationfollowed by thermal annealing, chemical bath deposition, or atomic layerdeposition method, as described for example, by Marika Edoff at UppsalaUniversity see “CIGS Thin Film Solar Cells, Uppsala University FinalReport, Project no. 22213-1 Swedish Energy Agency, Project leader:Markia Edoff, Period Jan. 01, 2005-Jun. 30, 2006.

State-of-the-art CdTe PV devices employ CdS as the wide bandgap n-typeheterojunction partner to CdTe. CdS has an optical band gap of 2.42 eV,which can be to small to pass the full spectrum of solar insolation intothe CdTe and that holes generated in the CdS are not collected by theCdTe. A thick CdS layer absorbs photons equivalent to approximately 6mA/cm² out of approximately 30 mA/cm² that could be absorbed by theCdTe. State-of-the-art CdTe PV devices therefore attempt to minimizethis current loss by 15 using thin CdS that passes much of the lightwith energy above the CdS bandgap. The lower limit on CdS thickness hasbeen attributed to the requirement that the heterojunction partnercontain sufficient charge to balance the negative space charge in theCdTe. State-of-the-art n-type junctions to CdTe therefore contain asecond high resistivity n-type “buffer” layer on the side of the CdSopposite to the CdTe. The n-type CdS can be covered with a highresistivity buffer layer that may contain doped or undoped transparentoxides such as SnO₂, SiO₂, SnO₂:Cd, SnO₂:Zn or CdZnO₂. The highresistivity buffer layer is believed both to add to the positive spacecharge and to mitigate effects of shunts through the CdS film. Much workhas been directed toward the high resistivity “buffer” layer. Suchbuffer layers, are described, for example in U.S. Pat. No. 5,279,678,which is incorporated by reference herein. In any case, previous CdTephotovotaice devices consider CdS to be the n-type material forming thepn junction with CdTe in pn junction devices or to be the n-typematerial in p-i-n devices such as the CdS/CdTe/ZnTe structure, forexample, where CdTe is the intrinsic layer and ZnTe is the p-type layer.

Much work has been directed toward making contacts to CdTe that enablelow loss transport of holes from the CdTe. In principle, low loss holetransport could be achieved using metals with work functions similar tothat of CdTe or using semiconductors whose work function is similar toCdTe and in addition have valence band maxima that are relatively closeto that of CdTe. The valence band maximum (VBM) of CdTe is about 5.74 eVbelow the vacuum level, however, and no metals with such high workfunctions are currently known. In an attempt to mitigate the impact ofthe relatively low work function of available metals, researchers haveemployed an interfacial layer between the semiconductor layer and theback metal contact layer intended to enable hole transport by tunnelinginto the metal electrode.

Previous attempts to treat the surfaces of a CdTe typically employ heavydoping of the region near the metal electrode with p-type dopants suchas copper, antimony, mercury or arsenic or employed various chemical orphysical methods to produce Te-rich regions near the interface.Alternatively researchers have employed highly doped or degeneratep-type semiconductors such as Cu_(2−x)Te, Cu_(2−x)O, HgTe or Sb₂Te₃ inan attempt to make tunnel junctions between the CdTe and metalelectrodes. Alternatively researchers have employed ZnTe as a low losshole transport contact to CdTe. See, for example, U.S. Pat. No.4,710,589 and U.S. Pat. No. 5,909,632, which are incorporated byreference herein. ZnTe can be a relatively wide bandgap semiconductorwhose valence band maximum closely matches that of CdTe. In principleZnTe has the added advantage that the positive step in the conductionband between CdTe and ZnTe would serve as an electron reflector forelectrons tending to move from the CdTe into the ZnTe. In one example anundoped ZnTe film could be positioned adjacent to a CdTe layer and asecond degenerately copper-doped ZnTe film could be positioned theopposite side of the undoped ZnTe film. With previous methods, it wasunclear what role was played by the matching the VBM of the CdTe andZnTe films and what role was played by the copper dopant. In any case,use of ZnTe did not improve the photovoltaic power conversion efficiencyof devices employing other contacts described above.

Amphiphilic molecules can also be used at the interfaces to alterelectrical performance of semiconductor devices by creating a dipolelayer on surfaces or at interfaces. See for example, H. Haick, M.Avbrico, T. Ligonzo, R. Tung, and D. Cahen, “ControllingSemioconductor/Metal Junction Barriers by Incomplete, Nonideal MolecularMonolayers”, J. Am. Chem. Soc. 2006, 128, pp 6854-6869, and David Cahenand co-authors G. Ashkenasy, D. Cahen, R. Cohen, A. Shanzer and A.Vilan, “Molecular Engineering of Semiconductor Surfaces and Devices”,Acc. Chem. Res. 2002, 35, pp 121-128.

Note that even in the absence of lattice mismatch, the symmetry of acrystal lattice can be distorted by the existence of an interfacebetween two materials of different electrical properties such thatdipole layers form at the interface due to differences in the nature ofchemical bonding between atoms of the heterojunction partners.

Previous methods have not included the use of high work function p-typeTCOs to treat semiconductor layers, in part due to the difficulty inproducing p-type TCOs with sufficiently high electrical conduction andoptical transparency to play the role equivalent to that played byn-type TCOs in other semiconductor devices.

Thus, the interfaces between a first semiconductor layer and a secondsemiconductor layer, or between a semiconductor layer and a metal layer,have significant impact on device performance. Further, both rectifyingand low resistance junctions with a semiconductor layer, such as asemiconductor layer including a CdTe, may include thin film interfaciallayers designed to improve electrical performance of the devices.Interfacial layer can be deposited by wet chemistry, sputter etching andsputter deposition, e-beam evaporation followed by thermal annealing,chemical bath deposition, or atomic layer deposition method.

An improved photovoltaic device can include an interfacial layer thataccounts for the chemical potential of a semiconductor, such as Cd, atthe interface between a semiconductor layer, such as a CdTe layer, and ahigh work function or wide bandgap semiconductor. Whereas the previousdevices specifically attempted to induce a p⁺ region in the vicinity ofthe p-type electrode or hole collector either by heavy doping or bylowering the chemical potential of Cd, an improved photovoltaic devicecan specifically maintain a high chemical potential of a semiconductor,such as Cd, to minimize formation of Cd vacancies and their associateddefect complexes. The claimed device achieves improved electricalproperties at interfaces through application of interface modificationsand interfacial layers that control the steady state electrochemicalpotential at and near the interface at a level suitable for achievinghigh power conversion efficiency photovoltaic devices.

In general, a pn photovoltaic device includes a transparent conductivelayer on a substrate, a first semiconductor layer including a widebandgap semiconductor, a second semiconductor layer and an interfaciallayer in contact with the second semiconductor layer, wherein theinterfacial layer maintains a chemical potential of the secondsemiconductor layer at a controlled level.

An interfacial layer can be between the second semiconductor layer and aback metal contact. A first wide bandgap semiconductor can be a CdS,SnO₂, CdO, ZnO, ZnSe, GaN, In₂O₃, CdSnO₄, ZnS or CdZnS and thesemiconductor may be either pure or doped with elements selected toachieve optimized electrical or optical properties. The interfaciallayer can be a third semiconductor layer including a wide bandgapsemiconductor. The interfacial layer can be a ZnTe, CdZnTe, CuAlS₂,CuAlSe₂, CuAlTe₂, CuAlO₂, CuGaO₂ or CuInO₂, any of which semiconductorscan be doped or undoped.

With respect to interfaces in CdTe photovoltaic devices, for example, Tebonds readily with most metals, M, forming M-Te bonds that may, in turn,reduce the electrons available to form Cd-Te bonds. The “weakly bonded”Cd atoms in the vicinity of a CdTe-metal interface therefore move towardthe surface of a CdTe layer and act as donors pinning the Fermi level atabout 1 eV above the valence band maximum. In order to minimize M-Tebonding in favor of CdTe bonding, one can dope CdTe heavily p-type inthe vicinity of the hole collector interface. In this manner, Cd-bondsare can be formed with Group V elements (e.g., N, P, As or Sb), whichcan serve as p-type dopants in bulk CdTe. Doping a CdTe interface with Nor other group V elements is the physical limit of producing a highlydoped, p⁺, interfacial layer adjacent to a CdTe layer, but doping of theinterface in and of itself is not sufficient to ensure stable high powerconversion efficiency. As can be seen in this description it is alsonecessary to consider the impact of the interfacial doping on the defectchemistry of the semiconductor material in the vicinity of theinterface. As power conversion devices, photovoltaic devices operateunder steady state conditions of illumination and bias as opposed toequilibrium conditions, thus the relevant defect chemistry for producingstable, high power conversion efficiency are conditions of illuminationand bias that occur in the field. Thus the interfacial layers of thesubject device control the steady state chemical potential both at theinterface of a CdTe layer and within the region near the CdTe interfacein a manner to optimize device performance under conditions ofillumination and bias.

Referring to FIG. 1, a photovoltaic device 10 can include a transparentconductive layer 140 on a substrate 130, a first semiconductor layer 102including a wide bandgap semiconductor 103, a second semiconductor layer100 and an interfacial layer 160 in contact with a second semiconductorlayer. The interfacial layer can be between the second semiconductorlayer and a back metal contact 150. The interfacial layer can besub-monolayer in thickness.

Referring to FIG. 2, a system 200 for generating electrical energy caninclude a photovoltaic device 20 having a transparent conductive layer240 on a substrate 230, a first semiconductor layer 202 including a widebandgap semiconductor 203, a second semiconductor layer 200 and aninterfacial layer 260 in contact with a second semiconductor layer. Theinterfacial layer can maintain a chemical potential of the secondsemiconductor layer at a controlled level in the interfacial region ofthe second semiconductor layer. An interfacial layer can be between asecond semiconductor layer and a back metal contact 250. A system canfurther include a first electrode 280 b connected to the transparentconductive layer and a second electrode 280 a connected to the backmetal contact.

Referring to FIG. 3, a photovoltaic device 30 can include a transparentconductive layer 340 on a substrate 330, a first semiconductor layer 302including a wide bandgap semiconductor 303, a second semiconductor layer300 and an interfacial layer 360 in contact with a second semiconductorlayer. The interfacial layer can maintain a chemical potential of thesecond semiconductor layer at a controlled level in the interfacialregion of the second semiconductor layer. A photovoltaic device can alsoinclude a back metal contact 350 on a second semiconductor layer.

Referring to FIG. 4, a photovoltaic device 40 can include a transparentconductive layer 440 on a substrate 430, a first semiconductor layer 402including a wide bandgap semiconductor 403, a second semiconductor layer400, a first interfacial layer 460 a, a second interfacial layer 460 b,and a back metal contact 450. The first interfacial layer 460 a can bein contact with the second semiconductor layer, between the secondsemiconductor layer and a back metal contact. The second interfaciallayer 460 b can be in contact with the second semiconductor layer,between the second semiconductor layer and the first semiconductorlayer. The first and second interfacial layers can maintain a chemicalpotential of the second semiconductor layer at a controlled level in theinterfacial region of the second semiconductor layer.

Referring to FIG. 5A, a photovoltaic device can include a transparentconductive layer 540 on a substrate 530, a first semiconductor layer 501including a wide bandgap semiconductor, a second semiconductor layer 502including a wide bandgap semiconductor, and a third semiconductor layer503 including a wide bandgap semiconductor layer. A first interfaciallayer 560 a can be in contact with the second semiconductor layer 502,between the second semiconductor layer and a third semiconductor layer503.

Referring to FIG. 5B, a photovoltaic device can include a transparentconductive layer 540 on a substrate 530, a first semiconductor layer 501including a wide bandgap semiconductor, a second semiconductor layer 502including a wide bandgap semiconductor, and a third semiconductor layer503 including a wide bandgap semiconductor layer. A first interfaciallayer 560 a can be in contact with the second semiconductor layer 502,between the second semiconductor layer and a first semiconductor layer501.

Referring to FIG. 5C, a photovoltaic device can include a transparentconductive layer 540 on a substrate 530, a first semiconductor layer 501including a wide bandgap semiconductor, a second semiconductor layer 502including a wide bandgap semiconductor, and a third semiconductor layer503 including a wide bandgap semiconductor layer. A first interfaciallayer 560 a can be in contact with the second semiconductor layer 502,between the second semiconductor layer and a third semiconductor layer503. An additional interfacial layer 560 b can be in contact with thesecond semiconductor layer 502, between the second semiconductor layerand a first semiconductor layer 501.

A first semiconductor layer can include a wide bandgap semiconductor. Awide bandgap semiconductor has a bandgap greater than 2.4 eV, and can bean n-type semiconductor, such as CdS, SnO₂, CdO, ZnO, ZnSe, GaN, In₂O₃,CdSnO₄, ZnS, or CdZnS for example. The wide bandgap semiconductor can beselected to have minimal or slightly positive offset between aconduction band minima of CdTe and a conduction band minima of the widebandgap semiconductor.

An interfacial layer can be between a second semiconductor layer and aback metal contact. The interfacial layer can include a GeTe, CdTe:P,CdTe:N, NiAs, or NbP. The interfacial layer can include a p-typesemiconductor such as ZnTe, CdZnTe, CuAlS₂, CuAlSe₂, CuAlTe₂, CuAlO₂,CuGaO₂, or CuInO₂. More generally, the interfacial layer can be amaterial with a chemical formula ABO₂, wherein A is either Cu, Ag, Au,Pt or Pd and B is one of the trivalent metal ions Al, In, Cr, Co, Fe,Ga, Ti, Co, Ni, Cs, Rh, Sn, Y, La, Pr, Nd, Sm or Eu, or dopedcompositions thereof. Alternatively the interfacial layer can have achemical composition CuAlX₂, wherein X is O, S, Se, or Te, or dopedcompositions thereof. The interfacial layer can maintain the chemicalpotential of cadmium at the interface and in a region adjacent to theinterface at a controlled level under steady state conditions ofillumination and bias.

The second semiconductor layer can include cadmium. The secondsemiconductor layer can include a CdTe. The second semiconductor layercan have a thickness of 2 microns or less. The second semiconductorlayer can have a thickness of 1 micron or less.

A first semiconductor layer can include a III-V compound or alloysthereof. A III-V compound can be a material with a chemical formula XY,wherein X is selected from a group including boron, aluminum, gallium,indium, and thallium, and Y is selected from a group including nitrogen,phosphorus, arsenic, antimony, and bismuth. A III-V compound can be agallium nitride, for example. The gallium nitride can be a galliumaluminum nitride.

A second semiconductor layer can include a II-VI compound or alloysthereof. A II-VI compound can be a material with a chemical formulaX'Y', wherein X' is selected from a group including zinc, cadmium,magnesium, manganese, and mercury, and Y' is selected from a groupincluding oxygen, sulfur, selenium, tellurium, and polonium. A II-VIcompound can be a cadmium telluride, for example.

A heterojunction can be formed between the II-VI compound and the III-Vcompound. An interfacial layer can form a rectifying junction, such as arectifying heterojunction between a II-VI compound and a III-V compound.

An interfacial layer can include an oxide or doped compositions thereof.The oxide can be a zinc oxide, for example. The oxide can be a mercuryoxide. The oxide can be a tin oxide. The oxide can be a doped tin oxide.The doped tin oxide can be a zinc-doped tin oxide. The doped tin oxidecan be a cadmium-doped tin oxide. The oxide can be a doped zinc oxide.The oxide can be a cadmium zinc oxide, copper oxide, iron oxide,magnesium oxide, nickel oxide, palladium oxide, silver oxide, strontiumoxide, titanium oxide, vanadium oxide, for example.

A photovoltaic device can further include a first electrode connected tothe transparent conductive layer and a second electrode connected to theback metal contact. The first electrode can be substantially transparentto light having an energy between 1 and 3 eV, and the second electrodecan be largely transparent to light with energy below the bandgap of thesecond semiconductor, for example, between 1 and 1.8 eV.

A method of manufacturing a photovoltaic device can include depositing afirst semiconductor layer on a substrate, the first semiconductor layerincluding a wide bandgap semiconductor, depositing a secondsemiconductor layer over the first semiconductor layer; and depositingan interfacial layer in contact with a second semiconductor layer. Theinterfacial layer can maintain the chemical potential of the secondsemiconductor layer at a controlled level in the interfacial region ofthe second semiconductor layer. The interfacial layer can be between thesecond semiconductor layer and a back metal contact. The interfaciallayer can be between the second semiconductor layer and the firstsemiconductor layer.

A method can include depositing an interfacial layer that can maintainthe chemical potential of cadmium. The interfacial layer can bedeposited by sputtering. The interfacial layer can be deposited byatomic layer deposition. The interfacial layer can be deposited byselective ion layer adsorption and reaction deposition.

A system for generating electrical energy can include a transparentconductive layer on a substrate, a first semiconductor layer including awide bandgap semiconductor, a second semiconductor layer, an interfaciallayer in contact with a second semiconductor layer. The interfaciallayer can maintain the chemical potential of the second semiconductorlayer at a controlled level in the interfacial region of the secondsemiconductor layer, a first electrical connection connected to thetransparent conductive layer, and a second electrical connectionconnected to the back metal contact. The interfacial layer can bebetween the second semiconductor layer and a back metal contact.

A system for generating electrical energy can include a first electrodeconnected to the transparent conductive layer and a second electrodeconnected to the back metal contact. The first electrode can besubstantially transparent to light having an energy between 1 and 3 eV,and the second electrode can be largely transparent to light with energybelow the bandgap of the second semiconductor. A system for generatingelectrical energy can include two or more photovoltaic devicespositioned in tandem.

An interfacial layer can be positioned on either side of a semiconductorlayer or on both sides of a semiconductor layer. A semiconductor layercan include CdTe or an alloy of CdTe with Zn, Hg, Mn, or Mg, forexample. Low resistance hole transport between a semiconductor layer anda metal contact or a semiconductor layer and another semiconductor layercan be achieved by using high work function materials or by other meanswell known by those versed in the art.

In one example, a photovoltaic device can have the following pnstructure:

EXAMPLE 1

Metal electrode Cr Interfacial layer: Cd_(x)Zn_(1−x)Te or Including ap-type semiconductor CdTe:N or CuAlO₂ Second semiconductor layer CdTeInterfacial layer: Including an n-type CdS semiconductor FirstSemiconductor Layer: including a SnO₂, or SnO₂:Zn or SnO₂:Cd widebandgap n-type semiconductor Transparent conductive layer SnO₂:F, ITO orCd₂SnO₄ Substrate Planar glass sheet

In a second example a photovoltaic device can have a third semiconductorlayer in contact with a second semiconductor layer

EXAMPLE 2

Metal electrode Cr Third semiconductor layer: including a ZnTe orCd_(x)Zn_(1−x)Te or CuAlO₂ wide bandgap p-type semiconductor Interfaciallayer: CdTe:N Including a p-type semiconductor Second semiconductorlayer CdTe Interfacial layer: Including an n-type CdS semiconductorFirst Semiconductor Layer: including a SnO₂, or SnO₂:Zn, SnO₂:Cd widebandgap n-type semiconductor Transparent conductive layer SnO₂:F, ITO orCd₂SnO₄ Substrate Planar glass sheet

A photovoltaic cell can have multiple layers. The multiple layers caninclude a bottom layer that can be a transparent conductive layer, acapping layer, a window layer, an absorber layer and a top layer. Eachlayer can be deposited at a different deposition station of amanufacturing line with a separate deposition gas supply and avacuum-sealed deposition chamber at each station as required. Thesubstrate can be transferred from deposition station to depositionstation via a rolling conveyor until all of the desired layers aredeposited. Additional layers can be added using other techniques such assputtering. Electrical conductors can be connected to the top and thebottom layers respectively to collect the electrical energy producedwhen solar energy is incident onto the absorber layer. A top substratelayer can be placed on top of the top layer to form a sandwich andcomplete the photovoltaic cell.

The bottom layer can be a transparent conductive layer, and can be, forexample, a transparent conductive oxide such as tin oxide or tin oxidedoped with fluorine.

The bottom layer of a photovoltaic cell can be a transparent conductivelayer. A thin capping layer can be on top of and at least covering thetransparent conductive layer in part. The next layer deposited can bethe first semiconductor layer, which can serve as a window layer and canbe thinner based on the use of a transparent conductive layer and thecapping layer. The next layer deposited can be the second semiconductorlayer, which serves as the absorber layer. Other layers, such as layersincluding dopants, can be deposited or otherwise placed on the substratethroughout the manufacturing process as needed.

The transparent conductive layer can be a transparent conductive oxide,such as a metallic oxide like tin oxide, which can be doped with, forexample, Zn or Cd. This layer can be deposited between the front contactand the first semiconductor layer, and can have a resistivitysufficiently high to reduce the effects of pinholes in the firstsemiconductor layer. Pinholes in the first semiconductor layer canresult in shunt formation between the second semiconductor layer and thefirst contact resulting in a drain on the local field surrounding thepinhole. A small increase in the resistance of this pathway candramatically reduce the area affected by the shunt.

The first semiconductor layer can serve as a window layer for the secondsemiconductor layer. The first semiconductor layer can be thinner thanthe second semiconductor layer. By being thinner, the firstsemiconductor layer can allow greater penetration of the shorterwavelengths of the incident light to the second semiconductor layer.

A number of embodiments have been described. Nevertheless, it will beunderstood that various modifications may be made without departing fromthe spirit and scope of the claimed device. For example, thesemiconductor layers can include a variety of other materials, as canthe materials used for the buffer layer and the capping layer.Accordingly, other embodiments are within the scope of the followingclaims.

1. A photovoltaic device comprising: a transparent conductive layer on asubstrate; a first semiconductor layer including a wide bandgapsemiconductor; a second semiconductor layer having a surface; and aninterfacial layer in contact with the second semiconductor layer,wherein the interfacial layer maintains a chemical potential of thesecond semiconductor layer at a controlled level.
 2. The device of claim1 wherein the second semiconductor layer includes a CdTe.
 3. The deviceof claim 1 wherein the second semiconductor layer includes an alloy ofCdTe.
 4. The device of claim 2 wherein the second semiconductor layerincludes CdTe alloys wherein Cd is at least partially replaced by Zn,Hg, Mg or Mn.
 5. The device of claim 2 wherein the second semiconductorlayer includes CdTe alloys wherein Te is at least partially replaced byS, Se or O.
 6. The device of claim 2 wherein the chemical potential isthat of Cd.
 7. The device of claim 1 wherein the chemical potential iscontrolled within a region of the semiconductor proximate to theinterface of the second semiconductor.
 8. The device of claim 1 whereinthe interfacial layer is between the second semiconductor layer and aback electrode.
 9. The device of claim 1 wherein the interfacial layeris a third semiconductor layer.
 10. The device of claim 1 wherein thesemiconductor material includes ZnTe, CdZnTe, CuAlS₂, CuAlSe₂, CuAlO₂,CuGaO₂, or CuInO₂.
 11. The device of claim 1 wherein the interfacialmaterial includes GeTe, CdTe:P, CdTe:N, NiAs or NbP.
 12. The device ofclaim 2 wherein the surface includes chemical bonds between Cd and anelement from column VA of the periodic table.
 13. The device of claim 12wherein the surface includes chemical bonds between Cd and N, P, As, andSb.
 14. The device of claim 1 wherein the interfacial layer is betweenthe second semiconductor and the first semiconductor layer.
 15. Thedevice of claim 1 in which the first semiconductor layer is SnO₂,SnO₂:Zn, SnO₂:Cd, ZnO, ZnSe, GaN, In₂O₃, CdSnO₃, ZnS or CdZnS.
 16. Thedevice of claim 1 wherein the interfacial layer is a compound of Cd withone any of the chalcogenides including O, S, or Se.
 17. The device ofclaim 1 wherein the interfacial layer includes a CdS.
 18. The device ofclaim 2 wherein the surface includes chemical bonds between Te and anyof the elements from column IIIA of the periodic table.
 19. The deviceof claim 18 wherein the surface includes chemical bonds between Te andB, Al, Ga, In, or Tl.
 20. The device of claim 1, wherein the interfaciallayer is a material with a chemical formula ABO₂, wherein A is eitherCu, Ag, Au, Pt or Pd and B is one of the trivalent metal ions Al, In,Cr, Co, Fe, Ga, Ti, Co, Ni, Cs, Rh, Sn, Y, La, Pr, Nd, Sm or Eu, ordoped compositions thereof.
 21. The device of claim 1 wherein secondsemiconductor layer is less than 2 um thick.
 22. The device of claim 1wherein the second semiconductor layer is less than 1 um thick.
 23. Thedevice of claim 1 further comprising an additional interfacial layerbetween a transparent conductive layer and a first semiconductor layer.24. A method of manufacturing a photovoltaic device comprising:depositing a first semiconductor layer on a substrate, the firstsemiconductor layer including a wide bandgap semiconductor; depositing asecond semiconductor layer over the first semiconductor layer; anddepositing an interfacial layer to contact a second semiconductor layer,wherein the interfacial layer maintains the chemical potential of thesecond semiconductor layer at a controlled level.
 25. The method ofclaim 24, wherein the interfacial layer is deposited by sputtering. 26.The method of claim 24, wherein the interfacial layer is deposited byatomic layer deposition.
 27. The method of claim 24, wherein theinterfacial layer is deposited by selective ion layer adsorption andreaction deposition.
 29. A system for generating electrical energycomprising: a transparent conductive layer on a substrate; a firstsemiconductor layer including a wide bandgap semiconductor; a secondsemiconductor layer; an interfacial layer in contact with a secondsemiconductor layer, wherein the interfacial layer maintains thechemical potential of the second semiconductor layer at a controlledlevel; a first electrical connection connected to the transparentconductive layer; and a second electrical connection connected to theback metal contact.
 30. The system of claim 29 wherein the transparentconducting layer electrode is replaced by a metallic electrode, and themetallic back electrode is replaced by a transparent conducting layerelectrode.
 31. The system of claim 29 further comprising a firstelectrode connected to the transparent conductive layer and a secondelectrode connected to the back metal contact.
 32. The system of claim29 wherein the back metal electrode is replaced by a transparentconductive layer and the device is used in tandem with anotherphotovoltaic device.